IDT

The IDT (Interrupt Descriptor Table), contains information about interrupt handling by the processor.

Each entry of the IDT is a 64bits descriptor:

As you can see there is three different gate. The first one, the task gate, is used to switch to a task on interrupt. The interrupt and trap gate are similar, except for one thing: hardware interruption are masked on an interrupt gate. The DPL flag indicates the privilege level needed to use the interruption with the assembly instruction int. Every gate should have a DPL of zero, except the syscall gate which should be accessible by the user.

Context switching

When an interrupt occurs, the processor switch to the function specified in the IDT. The state of all the registers remains unchanged, except for: cs, eip, and ss and esp if the interruption has caused a privilege-level change. So you must save the content of the registers before doing anything.

When the processor finally enter your code, here is the state of the stack:

Depending on the interruption, the error code may be present. You must pop it before returning from the interrupt handler.

Once you handled the interrupt, use the assembly instruction iret. Keep in mind that the stack should be clean before running it, or it will triple fault!

Loading the IDT

As for the GDT, a special register, the idtr gives the base address and the limit of the IDT. The format is exactly the same, and it can be loaded with the lidt instruction.