The k project

8254 controller

The Programmable Interval Timer is one of the standard devices bound to the PIC on the IBM PC. The chip used was originally the i8254. Today, another chip may be present or it can be integrated into the motherboard. However, in the latter cases, the i8254 is emulated, therefore one can consider that it can be used on every IBM PC compatible computer.


The PIT gathers three counters: Counter 0, Counter 1 and Counter 2.

  1. The first one is used to fire an interrupt at a user-defined frequency.
  2. The second one was historically used in order to periodically refresh the RAM, but it not used anymore.
  3. The last one is linked with the PC speaker, so you can use it in order to generate sound (which is composed of waves).

Operation Modes

The counters can be used with 6 modes.

  1. Mode 0: Interrupt on terminal count. This is the simplest mode of the PIT: it generates an interrupt when the counter expires. The counter’s output is initially low. The counter has to be set to a number. Then, it decreases until reaching 0, the output going high until the counter is re-initialized.
  2. Mode 1: hardware retriggerable one-shot. This one is very similar to the mode 0, except that the output will go high during the counting and then will go low when the counter expires.
  3. Mode 2: rate generator: the counter acts as a divide-by-n counter, which is commonly used as a periodically pulse generator. This is much like the Mode 0, except that the counter automatically loops when it reaches 0. This is the most used mode in current operating system.
  4. Mode 3: square generator: the counter behaves similarly to the Mode 2, except that the output goes high at the middle of the period, and returns low at the end of it.
  5. Mode 4: Software Triggered Strobe: like the mode 0, it can be used to generate a one-shot interrupt, however, the counting can be reinitialized before the counter reach 0. It can be used by a software watchdog which will retrigger the timer before it falls to zero, thus no interrupt will be generated.
  6. Mode 5: Hardware Triggered Strobe: similar to the mode 4, but the timer could be reinitialized by hardware.


The PIT’s control register (8 bits) is located on the I/O ports 0x43. To initialize the counter, one has to send Control Words to this I/O port.

c  c  io io m  m  m  b
----  ----- -------  |
 |      |      |     +-- (1)
 |      |      +-------- (2)
 |      +--------------- (3)
 +---------------------- (4)
  1. Binary counter (unset) or BCD counter (set)
  2. Mode to use, for example, 000 for mode 0, or 010 for mode 2
  3. Registers read/write policy:
    • 00: special mode to read the counters
    • 01: read/write the Least Significant Byte only
    • 10: read/write the Most Significant Byte only
    • 11: read/write LSB first, then MSB
  4. Counter to setup (0 to 2, 00 - 10)

The PIT’s counters registers (16 bits) are located to the following I/O ports:

Those registers should be written/read with two outb/inb. The order in which you get the data depend on the configuration register.

Usually the configuration sequence is as follow:

You should note that on most of the PIT mode, the data you will have to write to the counter register is in fact the divider of the internal clock rate. You can compute it with this formula:

divider = internal_frequency / desired_frequency

Where the internal frequency is equal to 1193182.

Attached files